Electronic Design

Signoff Evolves From Design-Rule Checking To Yield Analysis

IC designers are a lucky bunch. Through many years of semiconductor process evolution, the impact of manufacturing limitations and variations on layout could be encapsulated in relatively simple ...
Electronic Design

Design-Rule Checker Sports Foundry Compatibility

Advances in design checking capability, including foundry-compatible design-rule checking (DRC) and background DRC, are among the features of HiPer Verify, the first tool in a line of IC layout and ...
Semiconductor Engineering

Achieve Dramatic Productivity And Turnaround Time Improvements In Early Design Electrical Rule Checking

Early-stage layout vs. schematic (LVS) and circuit verification typically return large numbers of connectivity errors, which can be a critical bottleneck for both LVS and physical verification flows ...
Semiconductor Engineering

Automating Traditional PCB Layout Verification With Electrically Based Design Rule Checks

Electrical verification and sign-off of a printed circuit board (PCB) is a challenging, tedious, and manual process. If time permits, this visual inspection to catch errors that might cause costly ...
Nature

Rule-based design verification for mechanical parts with dynamic rule subset selection

In the product development process, it is essential to identify potential design errors in design data and correct them appropriately before production begins. This paper proposes a method for ...
Nasdaq

ASE launches its Integrated Design EcosystemTM to enable silicon package design efficiencies that reduce cycle time by half

SUNNYVALE, Calif.--(BUSINESS WIRE)-- Advanced Semiconductor Engineering, Inc. (ASE), a member of ASE Technology Holding Co., Ltd. (NYSE: ASX, TAIEX: 3711), today announced the launch of its Integrated ...